In high speed clocked memories, the overall memory access speed is often enhanced by including a pipeline register between the memory array output and the output driver. These memories are referred to as "registered" memories. Registered memories contrast with standard or "non-registered" memories which output only a single data quantity at a time, typically from a memory array to a single stage output driver.
In some applications, registered memories have faster access times than non-registered memories because of the pipeline register. Specifically, the pipelining effect created by the pipeline register allows one data quantity to be output from the pipeline register while, during an overlapping time period, the next data quantity is being fetched into the memory pipeline. For example, when using a registered memory in a burst address mode, when the first quantity is being output from the pipeline register, the second quantity in the burst sequence is being fetched into the pipeline register. Thus, the time between output quantities is only limited by the delay of the pipeline register (i.e., the time from clocking the pipeline register to the time it outputs the data) plus the delay of the output driver. In contrast, a non-registered memory has no pipelining and, thus, overlapping operations cannot occur.
In current (and future) computer systems, high speed clocked memories are often used as secondary data cache memory. Both registered and non-registered clocked memories may be used depending on availability and cost. Typically, a memory is commercially available in both registered and nonregistered output versions with otherwise identical specifications (other than access speed). In the prior art, these registered and non-registered memories are fabricated such that the decision between rendering a part either registered or non-registered must be made during the fabrication of the device. Typically, one or more of the fabrication layers of the device are identical, with a change in the metal layer determining whether the memory is registered or non-registered when construction is complete.
The present invention recognizes significant problems with the prior art technique for fabricating a memory as either registered or non-registered. For example, it is known that semiconductor fabrication techniques often yield parts with diverse speeds due to process variations and the like. Thus, if a part is already fabricated as a non-registered memory, but does not provide satisfactory output speed from its memory array, it may be useless and therefore necessary to discard the part. Obviously, such a result is costly, particularly if numerous slow parts are produced. Further, under the prior art, once the speed of the memory can be tested, at that point, the memory is already registered or non-registered and cannot be changed.
It is therefore an object of the present invention to provide a method and apparatus involving a memory which may be converted between a non-registered memory and a registered memory after the memory is fabricated.
It is a further object of the present invention to provide such a method and apparatus where the conversion of the memory is accomplished by rendering a fuse included within the memory not intact in order to change the operational mode of the memory.
It is a further object of the present invention to provide a method and apparatus involving a memory operable in a burst mode.
It is a further object of the present invention to provide such a method and apparatus where costs of fabrication and manufacture are reduced and yields are improved.
Still other objects and advantages of the present invention will become apparent to those of ordinary skill in the art having references to the following specification together with its drawings.